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Agere Announces New Mapper and Framer Chips

Agere Systems announced two system-on-a-chip (SoC) product families — “Datamapper” and “MARS T-PHY” — for building transport systems aimed at fast-growing markets such as the online gaming and VoIP . Mangrove Systems has selected Agere’s Datamapper and MARS T-PHY for its new MetroMPLS access and metro equipment platforms.

The Datamapper chip is described as the world’s first Ethernet-over-Synchronous Optical Network (SONET) mapper chip with integrated traffic management. The chip combines the following major functions: a layer two processing engine and traffic manager; SONET PHY; framer; mapper; cross connect; data engine; virtual concatenation (VC); generic framing procedure – framed and transparent (GFP-F/T); media access controller (MAC); SPI-3 bus for connectivity to a co-processor; and high-speed SerDes (serializer/deserializer). It provides the intelligence required to manage, organize and schedule different varieties of QoS. Agere said this level of integration allows equipment vendors to slash costs by offering a six-fold reduction in software effort and a 50% reduction in mapping and traffic management silicon costs.

Agere’s MARS-T-PHY is described as the world’s first framer family to combine a feature- rich, network-hardened 16-channel OC-3/OC-12; four-channel OC-48; and single OC-192 framer with 16 multi-rate, auto detect clock and data recovery (CDR)/mux/demux physical layer interfaces (PHYs). These interfaces meet SONET timing specifications. The chip is a software- compatible successor to Agere’s MARS-T-Universal chip. When combined with the auto rate detect feature in the integrated multi-rate CDR, the chip enables the design of a single equipment line card that supports all SONET/SDH rates. http://www.agere.com

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