Converge Digest

Intel Showcases 18A and 14A Progress, Advanced Packaging Innovations

At the Intel Direct event in San Jose, Dr. Naga Chandrasekaran, EVP and GM of Intel Foundry Technology and Manufacturing, delivered a sweeping update on Intel’s manufacturing roadmap, emphasizing progress on its 18A and 14A process nodes and major investments in advanced packaging capabilities. Intel confirmed it has entered the risk production phase for its 18A node—its most advanced process featuring backside power delivery and ribbonFET transistors—while 14A, its second-generation EUV and backside power node, is now under active development with projected 15–20% performance and 30% density improvements over 18A. Manufacturing ramp for 18A is targeted for late 2025 with sample wafers already delivered to customers.

Dr. Chandrasekaran outlined how Intel has spent $90 billion in recent years, with 80% directed toward global capacity expansion—including Arizona, Ireland, Israel, and Malaysia—and the remainder on R&D. Intel also highlighted its deepening customer-first mindset, shifting from a copy-exact approach to an agile, quality-driven foundry model. Key milestones included the 14A design ecosystem buildout, expansion of advanced packaging lines in New Mexico and Malaysia, and readiness for system-level 3DIC and co-packaged optics (CPO) technologies, critical for AI and high-performance compute workloads.

Intel’s advanced packaging roadmap now includes TSV, EMIB, Foveros, and new MCM solutions with silicon interposers to support HBM4 and UCIe 2.0 standards. The company showcased new robotic inspection tools powered by AI for predictive maintenance and factory automation. Dr. Chandrasekaran reinforced Intel’s commitment to customer trust, predictability, and ecosystem partnership as pillars for its transformation into a globally competitive foundry.

“We are committed—to our customers, to our partners, and to transforming Intel Foundry into a world-class, customer-first organization,” said Dr. Chandrasekaran.

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