Marvell unveiled its OCTEON TX2 family of infrastructure processors targeting a wide variety of wired and wireless networking equipment including switches, routers, secure gateways, firewall, network monitoring, 5G base stations, and smart NICs.
The fifth-generation OCTEON TX2 family promises a 2.5x improvement over the previous generation and scaling up to 200Gbps of packet processing throughput. OCTEON TX2 combines up to 36 cores, based on the Arm v8-A architecture with configurable and programmable hardware accelerator blocks, connected by Marvell’s field-proven and highly scalable coherent interconnect.
The OCTEON platform is enabled by a mature and widely deployed SDK, supported by robust software ecosystems consisting of both open source and commercial offerings. The platform includes firmware, Linux OS and multiple distributions, virtualization, containers, data plane development kit (DPDK), protocol stacks, infrastructure management and orchestration like OpenStack and Kubernetes, and virtual network functions (VNFs). In addition, Marvell supports a full routing stack including TCP, SSL, and IPSEC support and DPDK support for L2/L3 forwarding and IPSEC.
“Today’s data infrastructure requires significantly faster network throughput and higher end-to-end security at all nodes of the network,” said John Sakamoto, vice president of Infrastructure Processor Business Unit at Marvell. “Built on more than a decade of expertise, the OCTEON TX2 family extends Marvell’s performance leadership in supporting high-performance datapath and security applications with a 2.5x performance boost over previous generations.”
Marvell’s CN91xx, CN92xx, CN96xx, and CN98xx processor families include:
- 4 – 36 cores based on the Armv8-A architecture ranging up to 2.4 GHz frequency
- I/O with 25G SerDes-based I/O interfaces, e.g. 100GbE, 50GbE, 40GbE, 25GbE, 10GbE, 2.5GbE, 1GbE Ethernet ports and PCIe gen4 interfaces supporting root-complex and end-point configurations
- Enhanced NITROX V security co-processors which accelerate a comprehensive set of asymmetric and symmetric cryptographic operations
- Hardware accelerators support with comprehensive packet processing hardware offload, including packet receive, flexible packet parsing, flow classification, buffer management, QoS (quality of service), transmit processing and hierarchical traffic shaping and scheduling
- Load-balancing and work scheduling hardware which accounts for QoS, packet ordering and synchronization
In addition, Marvell is introducing a new generation family of OCTEON Fusion processors built on the OCTEON TX2 platform and optimized for cellular base station designs including baseband unit and smart radio unit applications. The OCTEON Fusion family is ideally suited for layer 1 processing in traditional all-in-one base stations as well as Distributed Unit (DU) processing in 5G split architectures. In addition, the highly scalable multi-core OCTEON Fusion architecture enables it to address a multitude of base station solutions from mid-capacity small cells to high-capacity modular macro cells. In the Radio Unit (RU), the family offers processing solutions for smart radio heads requiring more compute power to support the complex beamforming algorithms associated with massive MIMO antenna arrays.
The Marvell RAN portfolio includes:
- OCTEON Fusion: Complete 4G and 5G layer 1 baseband processing
- OCTEON TX2: Layer 2 and 3 transport and control plane processing
- Prestera: A line of Ethernet switching solutions for fronthaul, backhaul and intra-RAN connectivity
- Ethernet Connectivity: Marvell’s Ethernet adapter, controller, and PHY product lines provide a comprehensive set of connectivity options for RAN infrastructure
- Custom and semi-custom ASICS: OEM-differentiated solutions for baseband and radio unit designs
https://www.marvell.com/