Open Compute Project (OCP) has released a new Universal D2D Transaction and Link-Layer specification that broadens support to UCIe and other PHY standards, enabling greater silicon diversity in AI and HPC clusters. The specification provides a universal link layer that lets designers tune performance for specialized workloads while maintaining interoperability across different chiplet architectures. This move marks a significant milestone for OCP’s Open Chiplet Economy initiative, which seeks to foster a marketplace of interoperable chiplets and design tools.
The new standard allows mapping of transaction-layer protocols to physical interfaces with low-latency packetization, reducing the need for costly protocol bridges and complex conversions. By supporting extensibility, portability across different process nodes, and scalability to multiple PHY slices and data rates, the specification is designed to accommodate a wide range of markets including AI, data centers, automotive, aerospace, and communications infrastructure. OCP leaders say the ecosystem is now approaching maturity, with chiplet vendors actively contributing to standards and workflows that will further accelerate development.
OCP launched its Chiplet Marketplace in October 2024, providing system-in-package (SiP) designers access to chiplets, manufacturing services, chiplet-aware EDA tools, and reference materials. With the release of this universal link layer specification, OCP strengthens its role in establishing an open and multi-vendor semiconductor ecosystem that can support the performance and economic demands of emerging AI and HPC workloads.
• New OCP specification defines a Universal D2D link layer, now covering UCIe
• Enables customization of chiplet-based designs for specific AI/HPC workloads
• Provides low-latency, low-overhead packetization across multiple PHY standards
• Extensible to native bus protocols for interoperability and portability
• Supports scaling with multiple PHY slices and different data rates
• Builds on the OCP Chiplet Marketplace launched in October 2024
“OCP recognized several years ago that innovation in silicon needed to be amplified, just as the constraints of larger silicon dies were beginning to impede progress,” said Cliff Grossner, Ph.D., Chief Innovation Officer at OCP.
🌐 Why it Matters: Chiplet architectures are becoming central to next-generation AI and HPC systems, but success requires open standards to avoid vendor lock-in and costly integration challenges. By enabling interoperability and silicon diversity, OCP is laying the groundwork for a flexible ecosystem where specialized silicon can be mixed and matched for performance, efficiency, and economic gains.
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