Tilera, a start-up based in San Jose, California, closed a $25 million series-C round of investment financing for its multicore silicon. The round was oversubscribed and included funds from three new strategic investors: Broadcom, Quanta Computer and NTT Financing Corp. This brings the total venture capital investment in Tilera to $64 million.
Tilera’s processors are based on its “iMesh” architecture that scales to hundreds of RISC-based cores on a single chip. Tilera has two product families, the TILE and TILEPro, currently shipping to customers in networking, wireless infrastructure, communications and cloud computing markets. In October 2009 Tilera announced its TILE-Gx family, which includes the world’s first 100-core processor. This line will begin sampling later this year.
Tilera also announced the appointment of Nariman Yousefi, Senior Vice President of Infrastructure Technologies at Broadcom, to the Tilera Board of Directors.
http://www.tilera.com
- Tilera was founded in 2004 to bring to market the MIT research of Dr. Anant Agarwal who first created the mesh-based multicore architecture in 1996. The “Raw” project received multi-million dollar DARPA and National Science Foundation grants and spawned the development of the first tiled multicore processor prototype and associated multicore software in 2002.
- In 2007, Tilera launched its first “TILE64” processor containing 64 full-featured, programmable cores, each capable of running Linux. The on-chip architecture is designed to scale to hundreds and even thousands of cores. Tilera claims 10X the performance and 30X the performance-per-watt of the Intel dual-core Xeon, and 40X the performance of the leading Texas Instruments DSP. At the time, the company said its initial target markets for the TILE64 processor included the embedded networking and digital multimedia markets. This could include switches and security appliances with the performance of up to 20 Gbps for L4-L7 services.