Integrated Device Technology announced a multi-year collaboration with 5G Lab Germany on 5G tactile networks, including the application of IDT technology to enable network-connected autonomous vehicles.
The project extends the Dresden-based lab’s focus on combining 5G technologies with system-transforming applications.
IDT said its RapidIO technology will be used to explore two key elements of the network. First, the 100ns latency RapidIO switching and interconnect technology will be used to realize 5G Lab Germany’s vision of transforming the vehicle into a connected appliance by networking it with a 5G base station’s “edge computing” server. Second, it is planned for RapidIO technology to be evaluated to connect multiple vehicle sensors in real time for the mission-critical sensor fusion network essential for the self-driving or computer-assisted driving experience. A RapidIO-connected heterogeneous computer network will run real-time analytics to assist various network devices, including vehicles.
“With Germany’s leadership in the global automotive industry, our lab’s focus on the tactile Internet of Things, and IDT’s low-latency interconnect and market-leading timing portfolio, the key elements are in place to tackle the real-time mission-critical challenges of platforms for the tactile Internet, including autonomous vehicles,” said Gerhard Fettweis, 5G Lab chair and Vodafone chair professor for Mobile Communications Systems. “With the 1 millisecond round trip constraints in 5G deployments, we need low-latency computing platforms for vehicles, base station and edge computing servers. This project will explore connecting the requisite high-performance computing nodes through the deployment of IDT RapidIO technology and associated timing products.”
The collaboration will build on IDT’s recently announced RXS family of 50 Gbps RapidIO products, as well as computing appliances under development by IDT partners in the Open Compute Project’s (OCP) High-Performance Computing group. The OCP’s projects support heterogeneous computing between x86, ARM, Power Architecture, GPU and FPGAs.
