ltera announced the production availability of its full Agilex FPGA and SoC FPGA families, alongside a major upgrade to its Quartus Prime software toolchain. Unveiled during the company’s Innovators Day event, the update introduces enhanced logic density, faster memory interfaces, post-quantum cryptography (PQC) secure boot, and a new Visual Designer Studio aimed at reducing design complexity and time-to-market for FPGA developers.
The mid-range Agilex 5 D-Series now offers up to 1.6 million logic elements—2.5x more than previous models—alongside a 25% boost in DDR5 and LPDDR5 interface speeds (up to 5,600 MT/s and 5,500 MT/s respectively). These enhancements are designed to support demanding workloads such as edge AI inference, 4K/8K video, and emerging 5G/6G wireless systems. Altera’s PQC secure boot functionality, available across all Agilex 5 D-Series devices, underscores its focus on next-gen cryptographic readiness and embedded system security.
Quartus Prime version 25.3 brings significant toolchain advancements including Visual Designer Studio, a drag-and-drop interface that automates IP integration and can reduce design start times from five days to two hours. Altera also claims a 6% improvement in compile times and a 27% reduction since the production of Agilex 7 began. The company’s ASAP partner ecosystem, now with over 300 registered firms, further accelerates deployment by providing access to pre-qualified IP and services.
• All Agilex FPGA and SoC FPGA device families now in production
• Agilex 5 D-Series FPGAs offer up to 2.5X higher logic density (up to 1.6M logic elements)
• DDR5 and LPDDR5 interface speeds increased up to 5,600 MT/s and 5,500 MT/s
• PQC secure boot enabled on all Agilex 5 D-Series devices
• Quartus Prime 25.3 adds Visual Designer Studio for drag-and-drop IP integration
• Compile times reduced 6% over previous version; ALM usage also reduced
• Altera ASAP ecosystem includes over 300 partners for accelerated design support
“Altera is once again operating as a pure-play FPGA solutions provider, allowing us to operate with greater speed and agility so we can innovate faster, engage more closely with our customers, and respond rapidly to market shifts,” said Raghib Hussain, CEO of Altera.
🌐 Analysis: Altera’s return to independent operations underlines its ambition to grow the FPGA market beyond traditional use cases. The enhanced logic density and faster interfaces of Agilex 5 D-Series target high-throughput edge AI and next-gen wireless, positioning Altera against AMD/Xilinx’s Versal and Intel’s Stratix series. The introduction of PQC security features aligns with growing regulatory and defense sector demand. Quartus’ Visual Designer Studio also mirrors industry trends toward no-code/low-code hardware design, competing with similar efforts by Xilinx/Vitis and other toolchain vendors.
🌐 We’re tracking the latest developments in networking silicon. Follow our ongoing coverage at: https://convergedigest.com/category/semiconductors/
