Altera announced its plans for a 20-nm mixed-system fabric that includes the integration of 40-Gbps transceiver technology, a next-generation variable-precision digital signal processing (DSP) block architecture that delivers over 5 TFLOPs of IEEE 754 floating-point performance, and heterogeneous 3D ICs. Altera is using TSMC’s 20-nm process technology.
Altera said its 3D ICs are unique in that they integrate FPGAs with a user-customizable “HardCopy” ASIC or a variety of other technologies, including memory, third-party ASICs and optical interfaces through a high-speed interface.
“Designers of next-generation communications, networking, broadcast and computing applications are faced with the ever-increasing need for expanded bandwidth, higher performance and lower power,” said Bradley Howe, senior vice president of research and development at Altera. “Our innovations at 20 nm allow us to deliver a highly efficient, highly flexible mixed-system fabric that features optimal levels of dedicated circuitry with the latest 20‑nm FPGA process technology. The result is a device that delivers the industry’s highest levels of IC integration, performance and bandwidth at the lowest power.
