AppliedMicro introduced its next-generation PacketPro multicore processor System-on-a-Chip (SoC) family designed for multifunction printers, network control planes, access points, and industrial/security applications.
PacketPro is AppliedMicro’s second-generation embedded processor SoC family and features offload of critical features for multiple PowerPC processors with frequency capabilities ranging in performance from 600 MHz to 2.0 GHz and up. The line will employ 40nm technology and usage-based power management to reduce energy consumption. A multi-level crypto engine offers simultaneous wire-speed performance along with investment protection against product cloning and hardware-software tampering.
“PacketPro is an advanced SoC architecture that offers an ideal combination of high-performance and low power consumption at low cost,” said Vinay Ravuri, Vice President and General Manager of AppliedMicro’s Processing Products Division. “Flexible power management enables deep sleep operating power of less than 200mW and includes Wake on LAN, USB, PCIe and others. With the ability to scale-down and turn off SoC resources when not in use and to scale-up to full power when system demands require, PacketPro provides developers unprecedented ability to dynamically control power consumption levels.”
Some key features include: performance of up to 2 GHz per core, 32KB L1 I/D & 256KB dedicated L2 cache per core, support for full symmetric multiprocessing (SMP) and ultra flexible asymmetric multiprocessing (AMP). Memory and bus architecture supports 16/32/64-bit DDR2/3 up to 1,600Mbps and beyond with ECC option. Connectivity features include PCI-e Gen 2 controller, GE, 10GE, SGMII, RGMII, IEEE1588 Rev2 on all Ethernet ports, USB 2.0 – H/D, OTG, all with integrated PHY, USB 3.0, SATA ports and SDHC. The PacketPro family is manufactured on a 40nm TSMC CMOS process and is available in both wire-bond and flip-chip packaging. The first PacketPro device begins sampling in November. http://www.appliedmicro.com
