• Home
  • Events Calendar
  • Blueprint Guidelines
  • Privacy Policy
  • Subscribe to Daily Newsletter
  • NextGenInfra.io
No Result
View All Result
Converge Digest
Saturday, April 11, 2026
  • Home
  • Events Calendar
  • Blueprint Guidelines
  • Privacy Policy
  • Subscribe to Daily Newsletter
  • NextGenInfra.io
No Result
View All Result
Converge Digest
No Result
View All Result

Home » Argonne Leads DOE-Funded Project to Pioneer Extreme-Scale Memory

Argonne Leads DOE-Funded Project to Pioneer Extreme-Scale Memory

January 11, 2025
in Semiconductors
A A

The U.S. Department of Energy’s (DOE) Argonne National Laboratory will spearhead two groundbreaking microelectronics research projects aimed at advancing hardware and software co-design for next-generation computing. Funded through the CHIPS and Science Act of 2022, these projects will support transformative breakthroughs in energy efficiency, data processing speed, and resilience under extreme conditions. Argonne will lead these initiatives as part of the DOE’s Microelectronics Science Research Centers, a $160 million investment announced in December 2024.

The two projects, titled “Ultra Dense Memory: Atom Scale Material Dynamics and Systems Consequences” and “BIA: A Co-Design Methodology to Transform Materials and Computer Architecture Research for Energy Efficiency”, will collaborate with leading academic and industry partners to push the boundaries of microelectronics design. The research will focus on developing next-generation memory architectures and methodologies for energy-efficient computing, supporting high-performance computing and advanced sensor technologies.

Key Highlights of the Argonne Microelectronics Projects:

• Ultra Dense Memory Project:

• Led by Supratik Guha, senior adviser at Argonne.

• Focus: Developing extreme-scale memory for faster data processing.

• Partners: University of Chicago, Purdue University, Georgia Institute of Technology, Chicago State University.

• Industry Collaborators: IBM and Micron Technologies.

• BIA Project for Energy Efficiency:

• Led by Valerie Taylor, Distinguished Fellow and Director of Argonne’s Mathematics and Computer Science Division.

• Goal: Develop a co-design methodology for vertically stacked microelectronics, improving energy efficiency.

• Partners: Fermi National Accelerator Laboratory, University of Chicago, Northwestern University, Rice University.

• Industry Advisory Board: AMD, NVIDIA, Lam Research, Northrop Grumman, Enosemi.

These projects position Argonne at the forefront of microelectronics research, accelerating innovation in high-performance computing, AI, and sensor technologies while ensuring energy-efficient, scalable solutions for the next generation of information systems.

Tags: Memory
ShareTweetShare
Previous Post

Deutsche Telekom Unifies Wholesale Operations Under ‘T Wholesale’

Next Post

Ericsson and Global Telecom Giants Launch Aduna for APIs

Jim Carroll

Jim Carroll

Editor and Publisher, Converge! Network Digest, Optical Networks Daily - Covering the full stack of network convergence from Silicon Valley

Related Posts

Alphawave demos 9.2 Gbps HBM3E, 1.2 TBps memory bandwidth
Semiconductors

Alphawave demos 9.2 Gbps HBM3E, 1.2 TBps memory bandwidth

June 20, 2024
Rambus unveils 9.6 Gbps HBM3 Memory Controller IP
Semiconductors

Rambus unveils 9.6 Gbps HBM3 Memory Controller IP

October 25, 2023
SK hynix previews 321-layer 4D NAND
Semiconductors

SK hynix previews 321-layer 4D NAND

August 9, 2023
Video: Advancing Composable Memory Systems
All

Video: Advancing Composable Memory Systems

October 19, 2022
Rambus expands its line of DDR5 memory interface chips
All

Rambus expands its line of DDR5 memory interface chips

July 19, 2022
Rambus samples 5600 MT/s DDR5 registering clock driver
All

Rambus samples 5600 MT/s DDR5 registering clock driver

October 13, 2021
Next Post
New Venture Unites Telecom APIs for Global Developer Access

Ericsson and Global Telecom Giants Launch Aduna for APIs

Categories

  • 5G / 6G / Wi-Fi
  • AI Infrastructure
  • All
  • Automotive Networking
  • Blueprints
  • Clouds and Carriers
  • Data Centers
  • Enterprise
  • Explainer
  • Feature
  • Financials
  • Last Mile / Middle Mile
  • Legal / Regulatory
  • Optical
  • Quantum
  • Research
  • Security
  • Semiconductors
  • Space
  • Start-ups
  • Subsea
  • Sustainability
  • Video
  • Webinars

Archives

Tags

5G All AT&T Australia AWS Blueprint columns BroadbandWireless Broadcom China Ciena Cisco Data Centers Dell'Oro Ericsson FCC Financial Financials Huawei Infinera Intel Japan Juniper Last Mile Last Mille LTE Mergers and Acquisitions Mobile NFV Nokia Optical Packet Systems PacketVoice People Regulatory Satellite SDN Service Providers Silicon Silicon Valley StandardsWatch Storage TTP UK Verizon Wi-Fi
Converge Digest

A private dossier for networking and telecoms

Follow Us

  • Home
  • Events Calendar
  • Blueprint Guidelines
  • Privacy Policy
  • Subscribe to Daily Newsletter
  • NextGenInfra.io

© 2025 Converge Digest - A private dossier for networking and telecoms.

No Result
View All Result
  • Home
  • Events Calendar
  • Blueprint Guidelines
  • Privacy Policy
  • Subscribe to Daily Newsletter
  • NextGenInfra.io

© 2025 Converge Digest - A private dossier for networking and telecoms.

This website uses cookies. By continuing to use this website you are giving consent to cookies being used. Visit our Privacy and Cookie Policy.
Go to mobile version