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Home » Cavium Unleashes 64-bit ARM-based OCTEON TX

Cavium Unleashes 64-bit ARM-based OCTEON TX

May 3, 2016
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Cavium unveiled its OCTEON TX family, a line of 64-bit ARM based SOCs for control plane and data plane applications in networking, security, and storage.

The OCTEON TX combines Cavium’s data plane architecture with its optimized ARMv8.1 cores (the company continues to produce its OCTEON III processors, which are based on MIPS).

The new processors expand the addressability of Cavium’s embedded products into control plane application areas within enterprise, service provider, data center networking and storage that need support of extensive software ecosystem and virtualization features. This product line is also optimized to run multiple concurrent data and control planes simultaneously for security and router appliances, NFV and SDN infrastructure, service provider CPE, wireless transport, NAS, storage controllers, IOT gateways, printer and industrial applications.

Cavium said the control planes of next gen platforms will need to run commercial software distributions and operating systems (e.g., RHEL, Canonical and Java SE), support open source applications (e.g., OpenStack, OpenFlow and Quagga), launch services dynamically and run customer specific services. Multiple types of high performance data plane applications also need to be supported for firewall, content delivery, routing, and traffic management. While current OCTEON SOCs are used in applications for data plane as well as control plane with embedded software, control plane applications requiring wider software ecosystem and support traditionally have been addressed by the x86 architecture. The ARM architecture is able to service these critical needs.

OCTEON TX Highlights

  • Enhanced ThunderX (TX) ARM64 bit cores based on the latest ARM v8.1 ISA, with up to 2.2 GHz core frequency and 78K of I-Cache and 32K of D-Cache
  • CN80XX, CN81XX: From 1 to 4 cores, up to 2MB of Last Level Cache, 1x32b/64b DDR4 with ECC. Sampling in Q2.
  • CN82XX, CN83XX: From 8 to 24 cores, up to 8MB of Last Level Cache, up to 2x64b DDR4 with ECC. Sampling in Q3.
  • Simultaneous support of bulk and RSA crypto, from 400Mbps to 40Gbps of IPSEC performance and 600 to 20K RSA Ops/sec for 2048 bit keys.
  • Latest security features – Supports a wide variety of protocols including IPsec, SSL, TLS 1.x, DTLS and ECC Suite B. Also supports a wide variety of algorithms including several variants of AES, 3DES, SHA-2, SHA-3, RSA 2048, RSA 4096, RSA 8192, ECC p256/p384/p521, Kasumi, ZUC and SNOW 3G.
  • From 500Mbps to 50Gbps of Layer 3 forwarding
  • Up to 2x 32/64-bit DDR3/DDR4 controllers with ECC, with up to 2400MTS
  • Integrated Compression Engines with up to 40Gbps
  • High bandwidth IO: Integrates up to – 12 10Gb/1GbE, 3 40GbE, 4 PCI-Express Gen3, 6 SATA 3.0
  • Latest ARMv8.1 and SMMU v2 for data center class full-SOC virtualization support
  • Low Power to meet the strict thermal profiles of fanless designs, off-load cards and outdoor industrial grade form factors

“Cavium has delivered breakthrough performance for data plane and security applications with its multi-core OCTEON SOCs,” said Steve Klinger, General Manager, Infrastructure Processor Group at Cavium.   “The wide range of products in the OCTEON TX ARM 64-bit product line builds upon this success and expands the use of these products into control and embedded processing applications that leverage the fast growing ARM ecosystem and breadth of open source initiatives”.

http://www.cavium.com

Tags: Blueprint columnsCaviumSilicon
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