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Home » Cavium’s 64-Bit ARM ThunderX2 Packs up to 54 Cores

Cavium’s 64-Bit ARM ThunderX2 Packs up to 54 Cores

June 6, 2016
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Cavium unveiled its 64-bit ARM-based ThunderX2 processor for servers in cloud data centers used for workloads such as compute, security, storage, data analytics, network function virtualization (NFV) and distributed databases.

The second generation ARM processor from Cavium, which offers a number of on-board accelerators and advanced capabilities, packs up to 54 cores, enabling it to deliver two to three times the performance across a wide range of standard benchmarks and applications compared to ThunderX. It is built in 14nm FinFET process and is compliant with ARMv8.2 architecture as well as ARM’s Server Base System Architecture (SBSA) standard.

Key ThunderX2 features will include:

  • 2nd generation of full custom Cavium ARM core: 2.4 to 2.8GHz in normal mode, Up to 3 GHz in Turbo mode; > 2X single thread performance compared to ThunderX.
  • Up to 54 cores per socket delivering 2-3X socket level performance compared to ThunderX.
  • Cache: 40K I-Cache and 64K D-cache, highly associative; 32MB shared Last Level Cache (LLC).
  • Single and dual socket configuration support using 2nd generation of Cavium Coherent Interconnect with > 2.5X coherent bandwidth compared to ThunderX.
  • System Memory: 6 DDR4 memory controllers per socket; Dual DIMM per memory controller, for a total of 12 DIMMs per socket.
  • Full system virtualization for low latency from virtual machine to IO enabled through Cavium virtSOC technology.
  • Integrated 10/25/40/50/100GbE network connectivity.
  • Multiple integrated SATAv3 interfaces.
  • Integrated PCIe Gen3 interfaces, x1, x4, x8 and x16 support.
  • Integrated Hardware Accelerators: OCTEON style packet parsing, shaping, lookup, QoS and forwarding; Virtual Switch (vSwitch) offload; Virtualization, storage and NITROX V security.

Four versions of the ThunderX2 will be offered:

  • ThunderX2_CP:  Optimized for cloud compute workloads such as private and public clouds, web serving, web caching, web search, commercial HPC workloads such as computational fluid dynamics (CFD) and reservoir modeling. This family supports multiple 10/25/40/50/100 GbE network Interfaces and PCIe Gen3 interfaces. It also includes accelerators for virtualization and vSwitch offload.
  • ThunderX2_ST: Optimized for big data, cloud storage, massively parallel processing (MPP) databases and Data warehousing workloads. This family supports multiple 10/25/40/50/100 GbE network interfaces, PCIe Gen3 interfaces and SATAv3 interfaces. It also includes hardware accelerators for data protection/ integrity/security, user to user efficient data movement.
  • ThunderX2_SC:  Optimized for secure web front-end, security appliances and cloud RAN type workloads. This family supports multiple 10/25/40/50/100 GbE interfaces and PCIe Gen3 interfaces. Integrated hardware accelerators include Cavium’s industry leading, 5th generation NITROX security technology with acceleration for IPSec, RSA and SSL.
  • ThunderX2_NT: Optimized for media servers, scale-out embedded applications and NFV type workloads. This family supports multiple 10/25/40/50/100 GbE interfaces. It also includes OCTEON style hardware accelerators for packet parsing, shaping, lookup, QoS and forwarding.

“ThunderX2 combines our next generation core that will deliver significantly higher single thread performance with next generation IO and hardware accelerators to provide a compelling value proposition for the server market and greatly expand the serviceable server TAM,” said Syed Ali, President and CEO of Cavium. “ThunderX2 will enable flexible, scalable and fully optimizable servers for next generation software defined data centers.”

http://www.cavium.com

Cavium Unleashes 64-bit ARM-based OCTEON TX

Monday, May 02, 2016  Cavium, Silicon  2 comments

Cavium unveiled its OCTEON TX family, a line of 64-bit ARM based SOCs for control plane and data plane applications in networking, security, and storage.

The OCTEON TX combines Cavium’s data plane architecture with its optimized ARMv8.1 cores (the company continues to produce its OCTEON III processors, which are based on MIPS).

The new processors expand the addressability of Cavium’s embedded products into control plane application areas within enterprise, service provider, data center networking and storage that need support of extensive software ecosystem and virtualization features. This product line is also optimized to run multiple concurrent data and control planes simultaneously for security and router appliances, NFV and SDN infrastructure, service provider CPE, wireless transport, NAS, storage controllers, IOT gateways, printer and industrial applications.

Cavium said the control planes of next gen platforms will need to run commercial software distributions and operating systems (e.g., RHEL, Canonical and Java SE), support open source applications (e.g., OpenStack, OpenFlow and Quagga), launch services dynamically and run customer specific services. Multiple types of high performance data plane applications also need to be supported for firewall, content delivery, routing, and traffic management. While current OCTEON SOCs are used in applications for data plane as well as control plane with embedded software, control plane applications requiring wider software ecosystem and support traditionally have been addressed by the x86 architecture. The ARM architecture is able to service these critical needs.

Tags: ARMBlueprint columnsCaviumData CenterSilicon
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