Global Unichip Corporation (GUC) is using the Cadence Clarit 3D Solver in its simulation workflow to design a complex network switch with hundreds of 112G PAM4 long-reach (LR) lanes.
Cadence said the efficiency of the Clarity 3D Solver required no partitioning of the design, thereby eliminating any concern of inaccurate results attributed to a fractured approach. On top of the “no partitioning needed” benefit, the GUC engineers achieved a five-fold speedup compared to legacy tools that relied upon partitioning. The Clarity 3D Solver’s combination of exceptional accuracy, speed and capacity enabled GUC to perform tradeoffs and what-if analysis before tapeout and to optimize the detailed ultra-scale, high-performance flip-chip BGA (HFCBGA) package design for peak performance at the lowest cost.
“Exciting new technology such as Clarity 3D Solver, Celsius Thermal Solver, and Sigrity X are foundational to Cadence cross-domain, multiphysics solutions addressing EM, thermal and SI/PI for today’s electronic systems. Customer response has been tremendous to the unprecedented performance, capacity, scalability and accuracy of the Clarity 3D Solver performing true 3D simulations of complete systems including interposer, package, and PCB,” said Ben Gu, vice president of multiphysics system analysis in the Custom IC & PCB Group at Cadence. “GUC is continuing its design engineering excellence through design of this next-generation data center switch, for which Cadence Allegro, Clarity and Sigrity technologies played a significant role in the design, analysis and signoff of hundreds of 112G LR lanes.”
