IBM announced a new chip-making technology that could significantly increase the memory capacity and processing speeds of chips used in fiber-optic and wireless networks, and in such gear as routers and switches.
Specifically, IBM’s Cu-32 technology offers the industry’s first set of High Speed Serial (HSS) cores in 32nm silicon-on-insulator (SOI) technology. This could enable:
- 15G Backplane core supporting 16G Fibre Channel standard
- 15G Chip-to-Chip core supporting low-power optical and chip-to-chip applications
- 28G Backplane core supporting 32G Fibre Channel standard
- 6G standards core supporting PCI-Express Gen1 & Gen2 standards
- PCI-Express Gen3 core supporting PCI-Express Gen1, Gen2, and Gen3 standards
“By any measure — from the growing number of mobile users to the explosion we’re seeing in data — network traffic will grow at a pace we haven’t seen before,” said Mark Ireland, VP, Semiconductor Products, IBM. “Cu-32, our most advanced Custom Logic offering, with the industry’s best eDRAM and high speed serial links will provide our infrastructure partners the lead they need to create next-generation networks.”
“IBM’s Cu-32 technology with ARM advanced physical IP enables chip-makers to get powerful system-on-a-chip solutions quickly to market,” said Simon Segars, executive vice president and general manager, ARM physical IP division. “Our collaboration with IBM allows both companies to advance the state-of-the-art in the low-power embedded semiconductors that will help create next-generation networks.”http://www.ibm.com/chips
