Innovium, a start-up based in San Jose, California, announced sampling of its TERALYNX switch silicon.
“We are delighted to announce the sampling of our 12.8Tbps TERALYNX switch silicon,” said Rajiv Khemani, Co-founder & CEO. “TERALYNX was designed from a clean sheet and optimized for large data centers with critical innovations and capabilities. I am very proud of what our team has accomplished without feature compromises. The customer reception has been outstanding and Innovium looks forward to delivering a product with all the necessary capabilities to meet their needs.”
Some highlights:
- 12.8Tbps, 9.6Tbps, 6.4Tbps and 3.2Tbps single chip performance options at packet sizes of 300B or smaller
- Single flow performance of 400Gbps at 64B minimum packet size, 4x vs alternatives
- 70MB of on-chip buffer for superior network quality, fewer packet drops and substantially lower latency compared to off-chip buffering options
- Up to 128 ports of 100GbE, 64 ports of 200GbE or 32 ports of 400GbE, which enable flatter networks for lower Capex and fewer hops
- Support for cut-through with latency of less than 350ns
- Programmable, feature-rich INNOFLEX forwarding pipeline
- Comprehensive layer 2/3 forwarding and flexible tunneling including MPLS
- Large table resources with flexible allocation across L2, IPv4 and IPv6
- Line-rate, standards-based programmability to add new/custom features and protocols
- FLASHLIGHT telemetry and analytics to enable autonomous data center networks
