Intel announced plans to $3.5 billion to equip its New Mexico operations for the manufacturing of advanced semiconductor packaging technologies, including Foveros, its 3D packaging technology.
Foveros advanced 3D packaging technology enables Intel to build processors with compute tiles stacked vertically, rather than side-by-side, providing greater performance in a smaller footprint. It also allows Intel to mix and match compute tiles to optimize for cost and power efficiency.
“A key differentiator for our IDM 2.0 strategy is our unquestioned leadership in advanced packaging, which allows us to mix and match compute tiles to deliver the best products. We’re seeing tremendous interest in these capabilities from the industry, especially following the introduction of our new Intel Foundry Services. We’re proud to have invested in New Mexico for more than 40 years and we see our Rio Rancho campus continuing to play a critical role in Intel’s global manufacturing network in our new era of IDM 2.0,” stated Keyvan Esfarjani, Intel senior vice president and general manager of Manufacturing and Operations.
- In 2018, Intel first demonstrated a new 3D packaging technology, called “Foveros,” which for the first time brings 3D stacking to logic-on-logic integration.
Foveros will allow products to be broken up into smaller “chiplets,” where I/O, SRAM and power delivery circuits can be fabricated in a base die and high-performance logic chiplets are stacked on top.
U.S. DoD backs Intel for semiconductor packaging tech
The U.S. Department of Defense awarded a contract to Intel to enable the U.S. government to access Intel’s state-of-the-art semiconductor packaging capabilities in Arizona and Oregon.The project, which is supported by the DoD’s State-of-the-Art Heterogeneous Integration Prototype (SHIP) program, is executed by the Naval Surface Warfare Center, Crane Division, and administered by the National Security Technology Accelerator.The second phase…
