The Linux Foundation will host the CHIPS Alliance project. which curates high-quality open source code relevant to the design of silicon devices for mobile, computing, consumer electronics, and Internet of Things (IoT) applications.
CHIPS Alliance backers include Esperanto Technologies, Google, SiFive and Western Digital, all of which are committed to both open source hardware and continued momentum behind the free and open RISC-V architecture.
“Open collaboration has repeatedly proven to help industries accelerate time to market, achieve long-term maintainability, and create de facto standards,” said Mike Dolan, vice president of strategic programs, the Linux Foundation. “The same collaboration model applies to the hardware in a system, just as it does to software components. We are eager to host the CHIPS Alliance and invite more organizations to join the initiative to help propel collaborative innovation within the CPU and SoC markets.”
“As new workloads surface every day, we need new silicon designs in order to optimize processing requirements,” said Martin Fink, interim CEO of RISC-V Foundation and executive vice president and CTO of Western Digital. “Today’s legacy general purpose architectures are, in some cases, decades old. With the creation of the CHIPS Alliance, we are expecting to fast-track silicon innovation through the open source community.”
The CHIPS Alliance also announced a few planned contributions:
Google — planning to contribute a Universal Verification Methodology (UVM)-based instruction stream generator environment for RISC-V cores. The environment provides configurable, highly stressful instruction sequences that can verify architectural and micro-architectural corner-cases of designs.
Western Digital — planning to contribute their high performance, 9-stage, dual issue, 32-bit SweRV Core, together with a test bench, and high performance SweRV Instruction set simulator. Additional contribution will be specification and early implementations of OmniXtend cache coherence protocol.
SiFive — was founded by the inventors of the free and open RISC-V Instruction Set Architecture, who, together with their colleagues at UC Berkeley, developed the first opensource RISC-V microprocessors and a new opensource hardware description language Chisel. This initial work at UC Berkeley also developed the RocketChip SoC generator, including the initial version of the TileLink coherent interconnect fabric.
