Marvell is sharpening its focus on co-packaged optics (CPO) and advanced packaging as key enablers for next-generation AI data centers. At the company’s Investor Day event, Radha Nagarajan, Marvell’s SVP and CTO of Optical Engineering, described how silicon photonics and packaging innovations are now fundamental to scaling AI infrastructure—delivering the bandwidth, density, and power efficiency required to support ever-larger AI models.
Nagarajan highlighted how co-packaged optics is transforming data center architectures by integrating photonics and electronics on a common platform, eliminating traditional discrete optical components and enabling tighter system integration. Using mature CMOS silicon processes, Marvell’s silicon photonics supports a full product roadmap—shipping today at 400G, sampling at 800G, and designing at 1.6T for intra- and inter-data center optical links.
Complementing this, Mayank Mayukh, Senior Distinguished Engineer for Advanced Packaging, emphasized that packaging is now a primary driver of performance in AI hardware, on par with silicon design. Marvell has developed a modular packaging architecture that spans from 2.5D (chiplets on interposer) to 4.5D platforms that embed optical, electrical, and copper interconnects within engineered substrates. This packaging strategy allows for massive compute scaling, high-bandwidth connectivity, and improved energy efficiency—vital for hyperscaler and AI-specific data centers.
Together, Marvell’s advances in CPO and packaging technology are positioning the company to address growing AI interconnect demands, as hyperscalers and emerging AI players move toward more complex, custom-built compute platforms.
Materials are posted online.
