Marvell boosted its silicon portfolio with two new OCTEON 10 data processing units (DPUs) designed for data and control plane applications in routers, firewalls, 5G small cells, SD-WAN appliances, and control plane applications in top-of-rack switches and line card controllers.
The new OCTEON 10 CN102 and CN103 DPUs contain up to eight Arm Neoverse N2 cores, delivering 3x the performance of Marvell current DPU solutions for devices while reducing power consumption by 50% to 25 watts. Achieving SPEC CPU® (2017) integer rate (SPECint®) scores of 36.5, OCTEON 10 CN102 and CN103 are able to deliver nearly 1.5 SPECint points per watt2. The chips can serve as an offload DPU for host processors or as the primary processor in devices; advanced performance per watt also enables OEMs to design fanless systems to simplify systems and further reduce cost, maintenance and power consumption.
Marvell says several of the world’s largest networking equipment manufacturers have already incorporated the OCTEON 10 CN102 into a number of product designs.
“The idea behind the Marvell OCTEON 10 DPU platform is that every market and every customer segment deserve optimized processors. With Moore’s Law becoming more challenging, optimized design methodologies will become the primary engine propelling innovation in semiconductors,” said Will Chu, senior vice president, Compute and Custom Business Unit at Marvell.
Key Features of OCTEON 10 CN102 and CN103
- 5nm process
- 64-bit Arm Neoverse N2 core
- High integration with 20 Ethernet media access control (MAC) with MACsec support
- Inline IPsec engine to enable 50 Gbps IPsec with 50% of single N2 core
- Hardware packet acceleration with VPP optimization
- DDR5 up to 5600MT/s PCIe 5.0 (CN103xx only)
- 56G SerDes (CN103xx only)
