Micas Networks reported a reliability milestone for its 51.2 Tbps Co-Packaged Optics (CPO) switch system, achieving 4 million cumulative 400G-equivalent port device hours of link flap-free performance during trials with major hyperscalers and OEMs. The switch, which integrates Broadcom’s 51.2T Bailly CPO device with Tomahawk 5 and eight 6.4-Tbps SCIP optical engines, entered volume production earlier this year. Testing confirmed its reliability in AI and HPC workloads, where link flaps—temporary failures in optical links—can disrupt high-performance data center operations.
Micas’ architecture eliminates the traditional pluggable optics interface, embedding optics directly alongside the switch silicon. This co-packaged design improves signal integrity and reduces latency and power consumption, critical for hyperscale AI infrastructure. According to the company, a 30,528-GPU cluster built with its CPO system could reduce power usage by approximately 466 kW compared to DSP-based pluggables. This results in lower operational costs and a smaller environmental footprint.
The company also announced five patent applications covering advancements in fiber routing, chip cooling, device inspection, assembly, and testing. Micas will showcase the technology at ECOC 2025 in Copenhagen, co-exhibiting at Eoptolink’s stand. The CPO switch is part of a long-term collaboration with Broadcom aimed at driving the transition from copper to photonics in next-generation networks.
- Micas achieved 4 million flap-free link hours in 51.2T CPO switch testing
- System uses Broadcom’s Tomahawk 5 and SCIP optical engines
- Switch entered volume production earlier in 2025
- 466 kW power savings estimated for a 30K+ GPU cluster
- Five new patents filed on CPO-related system innovations
- Demonstrations available at Micas’ HQ and during ECOC25 in Copenhagen
“Our close partnership with Broadcom has been central to this success. As our key component supplier and long-term collaborator, Broadcom’s silicon innovation combined with Micas’ system expertise enables breakthrough performance and reliability,” said Charlie Hou, VP of Strategy for Micas Networks.
🌐 Analysis: In AI training environments, link flapping—frequent and brief transitions of a network port between up and down states—can severely impact system stability and job completion. Large-scale AI clusters rely on tightly synchronized GPU communication using high-bandwidth, low-latency fabrics. Even short-lived link disruptions can cause distributed training jobs to hang, fail, or restart, wasting compute cycles and increasing overall training time and cost.
Link flaps often originate from signal integrity issues in traditional pluggable optics due to thermal drift, mechanical instability, or wear on electrical connectors. As system bandwidths climb beyond 400G and into 800G+ per port, maintaining consistent performance across thousands of links becomes increasingly difficult.
Co-Packaged Optics (CPO) directly addresses this by eliminating the pluggable interface. By co-locating the optics next to the switch ASIC inside the same package, the electrical trace lengths are drastically shortened. This reduces power, improves signal integrity, and minimizes thermal variation—collectively reducing the risk of transient errors that cause link flaps. The 4 million flap-free hours achieved by Micas suggests CPO may be critical for stabilizing large-scale AI training fabrics as they scale to tens of thousands of nodes.
🌐 We’re tracking the latest developments at ECOC25 in Copenhagen. Follow our ongoing coverage at https://convergedigest.com/tag/ecoc25/
🌐 We’re launching the “Data Center Networking for AI” series on NextGenInfra.io and inviting companies building real solutions—silicon, optics, fabrics, switches, software, orchestration—to share their views on video and in our expert report. To get involved, send a note to jcarroll@convergedigest.com or info@nextgeninfra.io.
