Micron Technology is working with Intel to deliver an on-package memory solution for Intel’s next-generation Xeon Phi processor, codenamed Knights Landing. The on-going collaboration leverages fundamental DRAM and stacking technologies also found in Micron’s Hybrid Memory Cube products.
The on package memory combines high-speed logic and DRAM layers into one optimized package that will set a new industry benchmark for performance and energy efficiency. Intel said Knights Landing will deliver 5X the sustained memory bandwidth versus DDR4 with one-third the energy per bit in half the footprint.
“Intel’s many integrated cores (MIC) architecture and Micron’s high performance memory is a formidable combination,” said Tom Eby, vice president for Micron’s compute and networking business unit. “Intel’s and Micron’s advanced technologies successfully marry the processor to a memory system that delivers the very rare coupling of low power and extreme bandwidth.”
“The next-generation Intel® Xeon Phi processor, codenamed Knights Landing, will launch with up to 16GB of high performance, on-package memory that delivers dramastically improved the sustained memory bandwidth versus DDR4 and brings tremendous power-efficiency and space-savings. It is the first Intel HPC processor to use this new high performance on package memory,” said Charles Wuischpard, Vice President, General Manager, Workstations and High Performance Computing Data Center Group at Intel. “This will allow the world’s leading researchers, scientists, and engineers to run larger workloads faster while maintaining current code investments. We’re pleased to be working with Micron to deliver it.”
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