The OIF has commenced work on three new electrical interface projects addressing next generation needs for high speed and low power electrical interfaces. These include: The Ultra Short Reach Electrical Interface, which will define a link of less than 10 mm between an ASIC and an Optical Engine (OE) at data rates up to and including 56 Gbps. This will enable the industry to develop Multi Chip Modules (MCMs) and alternate advanced packaging schemes that are optimized for minimum power consumption.
The Close Proximity Electrical Interface, which will define a link with a reach of less than 50 mm from chip to discrete OE at data rates up to and including 56 Gbps. This will facilitate an efficient board mounted OE at low power.
The CEI-56G-Very Short Reach project, will determine optimum modulation format based on measurements, verification and CMOS Switch ASIC I/O capability. The project looks at single lane electrical I/O data rates beyond 28 Gbps needed for future chip-to-module applications, including single lane interfaces for 40 Gbps modules and 8-10 lane interfaces for 400 Gbps modules. “These projects address different elements of the important electrical interface beyond 100G transmission, where speed and power will become an increasingly difficult issue,” said Dave Stauffer of IBM Corp. and the OIF’s Physical and Link Layer Working Group Chair. “Based on our Common Electrical Interface (CEI) work, the industry has turned to the OIF to drive the next phase in electrical interfaces which will include data rates up to 56 Gbps.”
14-May-12
