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Home » PMC-Sierra Introduces Single-Chip Add/Drop Multiplexer Devices

PMC-Sierra Introduces Single-Chip Add/Drop Multiplexer Devices

June 13, 2004
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PMC-Sierra introduced two new single-chip SONET Add/Drop Multiplexer devices designed to enable a new generation of small footprint, carrier-class, optical access equipment for extending legacy and next-generation services to small and mid-sized enterprises. The highly integrated ADM 622 devices target the access and metro-edge markets, supporting such services as Ethernet Virtual LANs (VLANs).

PMC-Sierra said its new ADM 622 devices provide all the features necessary to build a complete ADM or Terminal Multiplexer. They are cost-optimized for compact OC-3/STM-1 and OC-12/STM-4 optical networking equipment deployed in remote terminals or customer premises equipment, where service density does not justify deployment of larger, more expensive MSPPs. Both the ADM 622 and ADM 622 PDH devices integrate SONET/SDH framers and pointer processors, PDH mappers, expansion interfaces, and a cross-connect; the ADM 622 device also integrates Ethernet-over-SONET/SDH interfaces with Layer 2 processing.

The Layer 2 processor provides aggregation, grooming, policing, and Ethernet Operations, Administration and Maintenance (OAM) capabilities to enable next-generation services without the need for an external Ethernet switch or network processor. Using the standards-based policing mechanism, carriers may now provide service granularity in 1 Mbps increments rather than the 1.5 Mbps, 2 Mbps, or 51.84 Mbps granularity associated with virtual concatenation. The ADM 622 supports Ethernet OAM using a flexible packet insert and extract mechanism enabling Ethernet link monitoring and fault isolation capabilities that are required for carrier grade network access services. In addition, the ADM 622 provides packet grooming and aggregation capabilities which enable virtual private line connections or multiple private line connections from a single Ethernet client interface. The design also support a number of redundancy strategies.

Both devices are designed in 0.13 micron CMOS technology and packaged in an 896-ball, 31x31mm Flip Chip Ball Grid Array package. http://www.pmc-sierra.com/networking

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