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Home » Rambus teams with Samsung to offer 56G SerDes PHY

Rambus teams with Samsung to offer 56G SerDes PHY

April 24, 2017
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Rambus, a supplier of hardware and software technologies for the communications market, announced that it is partnering with Samsung Electronics to develop its recently launched 56 Gbit/s SerDes PHY on Samsung’s 10 nm LPP (low-power plus) process technology.

Rambus’ 56 Gbit/s SerDes PHY is designed to deliver enterprise-class performance in challenging signalling environments typical for high-speed communication systems and provides PAM4 and NRZ signalling with a scalable ADC-based architecture. The flexible device architecture targets long-reach backplane requirements to support the transition to 400 Gigabit Ethernet applications.

Rambus unveiled the 56 Gbit/s multi-protocol SerDes PHY, developed on advanced, second generation FinFET process technology, in February this year. The solution is designed to address demanding communications and data centre applications.

The Rambus 56 Gbit/s SerDes PHY features a 28 GS/s ADC integrated directly into the architecture to enable scalability and extended reach. The PHY can support data rates from 9.95 up to 58 Gbit/s across copper and backplane channels with more than 35 dB channel insertion loss for a range of standard interconnect protocols.

The 56G MPS are designed with a system-oriented approach, taking the interface, interconnect and channel into account when optimising performance and features to maximize flexibility in today’s most challenging system environments and applications. This makes the PHYs ideal for many long-reach, copper and backplane enterprise environments.

Also in February, Rambus announced the availability of its High Bandwidth Memory (HBM) Gen2 PHY, developed for GLOBALFOUNDRIES FX-14 ASIC platform. Leveraging the GLOBALFOUNDRIES 14 nm FinFET (14LPP) process technology, the Rambus HBM PHY is designed for networking and data centre applications, in particular systems demanding low latency and high bandwidth memory performance.

Rambus HBM Gen2 PHY is compliant with the JEDEC HBM2 standard and can support data rates up to 2,000 Mbit/s per data pin to deliver an aggregate bandwidth of 256 Gbit/s for data-intensive tasks.

Regarding the collaboration with Samsung, Ryan Lee, VP, foundry marketing team at Samsung Electronics, said, “Network application is one of Samsung’s key segments of focus and the composition of its 10LPP network solution and the Rambus 56 Gbit/s solution will… (offer) high performance and low power consumption… for data processing requirements to come”.

https://www.rambus.com/rambus-partners-with-samsung-to-develop-56g-serdes-phy-on-10nm-lpp-process/

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