Samsung Electronics announced a successful network processor tape-out based on its 14LPP (low-power plus) process technology that was implemented in collaboration with eSilicon and Rambus.
The network processor tape-out was based on Samsung’s advanced foundry process and design infra for network applications, eSilicon’s complex ASIC and 2.5D design capability with its IP solutions and a high-speed 28 Gbit/s SerDes solution from Rambus.
Samsung noted that its 14LPP process technology, based on 3D FinFET structure, has been proven for performance and manufacturability through mass production The next generation process for network application is 10LPP process, based on 10LPE (low-power early), for which production commenced last year, with mass production scheduled to begin by the end of 2017.
Samsung has also named its newly developed 2.5D turnkey solution, which serves to connect a logic chip and HBM2 memory via an interposer, as I-Cube (Interposer-Cube). The 14LPP network process chip is the first product to feature its I-Cube solution and HBM2 memory and is designed to support key network applications for high-speed signalling, and potentially further applications such as computing, server and AI in the future.
Commenting on the achievement, Patrick Soheili, VP of product management and corporate development at eSilicon, said, “eSilicon brings its FinFET ASIC and interposer design skills, along with 2.5D integration skills to the project… its HBM Gen2 PHY, custom flip-chip package design and custom memory designs also helped to optimise the power, performance and area for the project”.
While Rambus’ Luc Seraphin, SVP and GM, memory and interfaces division, noted, “Networking OEMs are looking for quality… IP suppliers that can bring 28 Gbit/s backplane SerDes in advanced FinFET process nodes to market… the success with Samsung and eSilicon is a testament that these leading solutions are attainable…”.
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