SiFive launched its 2nd Generation Intelligence family of RISC-V processors, adding five new products optimized for AI workloads across edge and embedded applications. The lineup includes the new X160 Gen 2 and X180 Gen 2 cores, alongside upgraded X280 Gen 2, X390 Gen 2, and XM Gen 2 offerings. All products feature enhanced scalar, vector, and matrix processing capabilities, enabling AI acceleration in environments with tight power and area constraints.
The new X160 and X180 target far-edge compute and IoT use cases, including automotive, robotics, industrial automation, and smart devices. SiFive said its vector-based designs allow higher AI performance per watt compared to scalar-only CPUs, with the XM product extending into matrix processing for advanced workloads. The company also emphasized the ability of its IP to serve as Accelerator Control Units, supporting co-processor interfaces such as SSCI and VCIX for platform-level integration.
SiFive noted adoption of its X100 series by two Tier 1 U.S. semiconductor companies and expects first silicon from the Gen 2 lineup in Q2 2026. The company will showcase the new portfolio at the AI Infra Summit in Santa Clara this week.
• Five new RISC-V products: X160, X180, X280, X390, XM Gen 2
• Enhanced vector and matrix processing for AI workloads
• X160/X180 target low-power far-edge and IoT deployments
• Accelerator Control Unit functions for platform integration
• First silicon expected Q2 2026; licensing available now
“AI is catalyzing the next era of the RISC-V revolution,” said Patrick Little, CEO of SiFive. “Our new 2nd Generation Intelligence IP builds on this momentum, adding new features and configurability to accelerate our customers’ designs and time to market.”
🌐 Analysis: SiFive is positioning its RISC-V cores to capture the fast-growing edge AI segment, where power, cost, and flexibility are critical. With Deloitte forecasting 78% growth in AI edge compute, the timing is strategic. SiFive’s emphasis on vector and matrix extensions addresses both efficiency and performance gaps compared to Arm and x86 incumbents, while the ability to act as an Accelerator Control Unit may broaden its role in heterogeneous compute architectures. Founded in 2015 and headquartered in Santa Clara, SiFive was created by RISC-V inventors Krste Asanovic, Yunsup Lee, and Andrew Waterman. The company has raised over $350 million from investors including Intel Capital, Qualcomm Ventures, and SK Hynix, and has steadily expanded its portfolio into AI, automotive, and data center markets, securing design wins at major semiconductor firms.
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