MediaTek announced its MT3729 800G (400G dual port) MACsec retimer PHY for data centers and cloud infrastructure.
The new device, which integrates MediaTek’s 56G PAM4 SerDes technology, is available as a standalone application-specific standard part (ASSP) or it can be integrated into a network controller chip. The MT3729 800G PHY is ideal for line cards or switch fabrics in conjunction with network controller application-specific integrated circuits (ASICs) to build multi-terabit network servers, switches and routers. It enables secure data links and highly accurate precision time protocol (PTP) timestamping.
“With our broad portfolio of networking solutions, MediaTek is meeting the growing bandwidth and security needs of modern network infrastructure, including hyper-scale, cloud, service provider and enterprise networks,” said Jerry Yu, MediaTek Corporate Vice President. “Our MT3729 PHY integrates advanced MACsec-based encryption for secure communications and highly accurate PTP timestamping for the latest 5G synchronization requirements, while also giving our customers different integration options for added flexibility.”
The MT3729 packs four different operation modes:
- Retimer Mode: Built-in signal enforcement technology extends the SerDes connection distance and transmission to the edge for more precise timestamping.
- Forward/Reverse Gearbox Mode: Support for bitrate translation between 56G and 28G links enables next generation switches to seamlessly connect with existing infrastructure.
- MUX/DeMUX Mode: Hitless MUX and broadcast switching meets networking redundancy requirements.
- MACsec Mode: IEEE 802.1AE MACsec support enables secure communications with AES-128 and AES-256 encryption from 1G to 400G per port.
The MT3729 PHY supports up to 16 bi-directional links at 56G PAM4, up to 28G NRZ SerDes and 1G SGMII. To meet the stringent 5G infrastructure timing requirements, the MT3729 supports IEEE 1588v2 and SyncE up to Class-C for greater accuracy and more flexibility with timestamping formats.
