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Home » Teranetics Integrates 10GBASE-T Chip with National's PowerWise Technology

Teranetics Integrates 10GBASE-T Chip with National's PowerWise Technology

September 22, 2008
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Teranetics announced that its TN2022 dual port PHY for 10GBASE-T now includes support of National Semiconductor ‘s “PowerWise” adaptive voltage scaling (AVS) technology to reduce per-port power. Teranetics’ TN2022 already offered a power efficient design requiring only 6 Watts per port using conventional techniques. The companies said that integrating National’s PowerWise technology makes 10GBASE-T system implementations more compelling and more broadly applicable across a range of networking and computing equipment.

Ratified by the IEEE in June 2006, 10GBASE-T (IEEE 802.3an) defines the transmission of 10Gbps Ethernet over unshielded twisted pair (UTP) copper cabling. As with previous speed generations of Ethernet technology, the creation of the copper standard lowers the cost of 10 Gbps network links below that of optical technologies and further accelerates the adoption of 10 Gigabit Ethernet into network infrastructures.http://www.teranetics.com

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