TPACK introduced an upgraded version of its PBB-TE/T-MPLS/VPLS Carrier Packet Engine, which is a commercial chip solution based on an Altera Stratix III FPGA, designed for Carrier Ethernet gateway devices. The TPX3103 device can provide a maximum non-blocking, full duplex switching capacity of 52 Gbps, allowing a maximum of 48x 1 Gigabit or 4x 10 Gigabit Ethernet ports. TPACK said the advantage of its chip is that it allows rapid updates in response to changes in PBB-TE, T-MPLS and VPLS standards, which are likely to occur over the coming years.
TPACK’s TPX3103 device provides support for PBB-TE and T-MPLS OAM, allowing protection switching times well within the 50msec carrier grade specification. In addition, the TPX3103 provides extended security control with Access Control Lists, more RMON monitoring capabilities and enhanced ingress flow control mechanisms making the TPX3103 suitable for application in a number of platforms including Carrier Ethernet Switches, MSPPs and Packet Optical Transport Platforms.
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