Western Digital commenced initial production of its fifth-generation 3D NAND technology, BiCS5, in a 512-gigabit (Gb) chip.
BiCS5 is Western Digital’s highest density and most advanced 3D NAND technology to date. Second-generation multi-tier memory hole technology, improved engineering processes and other 3D NAND cell enhancements significantly increase cell array density horizontally across the wafer. These “lateral scaling” advancements in combination with 112 layers of vertical memory capability enables BiCS5 to offer up to 40 percent more bits of storage capacity per wafer compared to Western Digital’s 96-layer BiCS4 technology, while optimizing cost. New design enhancements also accelerate performance, enabling BiCS5 to offer up to 50 percent faster I/O performance compared to BiCS4.
Production of BiCS5 in meaningful commercial volumes is expected in the second half of calendar 2020.
“As we move into the next decade, a new approach to 3D NAND scaling is critical to continuing to meet the demands of the rising volume and velocity of data,” said Dr. Steve Paak, senior vice president of memory technology and manufacturing at Western Digital. “Our successful production of BiCS5 is an illustration of Western Digital’s ongoing leadership in flash memory technology and strong execution to our roadmap. By leveraging new advancements to our multi-tier memory hole technology to increase density laterally as well as adding more storage layers, we have significantly scaled the capacity and performance of our 3D NAND technology, while continuing to deliver the reliability and cost which our customers expect.”
