Xilinx introduced its latest Versal HBM adaptive compute acceleration platform (ACAP), which integrate the most advanced HBM2e DRAM, providing 820GB/s of throughput and 32GB of capacity for 8X more memory bandwidth and 63% lower power than DDR5 implementations.
The Versal HBM series is architected to keep up with the higher memory needs of the most compute intensive, memory bound applications for data center, wired networking, test and measurement, and aerospace and defense.
“Many real-time, high-performance applications are critically bottlenecked by memory bandwidth and operate at the edge of their power and thermal limits,” said Sumit Shah, senior director, Product Management and Marketing at Xilinx. “The Versal HBM series eliminates those bottlenecks to provide our customers with a solution that delivers significantly higher performance and reduced system power, latency, form factor, and total cost of ownership for data center and network operators.”
Key features of the Versal HBM devices:
- power-optimized networking cores for high bandwidth, secure connectivity
- 5.6Tb/s of serial bandwidth with 112Gb/s PAM4 transceivers
- 2.4Tb/s of scalable Ethernet bandwidth
- 1.2Tb/s of line rate encryption throughput
- 600Gb/s of Interlaken connectivity, and
- 1.5Tb/s of PCIe Gen5 bandwidth with built-in DMA, supporting both CCIX and CXL.
Xilinx says the new Versal HBM ACAPs deliver the network scalability and performance needed for 800G routers, switches, and security appliances. Sampling is expected in the first half of 2022.
