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Home » Zarlink Launches Low-Density Circuit Emulation-over-Packet Processors

Zarlink Launches Low-Density Circuit Emulation-over-Packet Processors

December 14, 2004
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Zarlink Semiconductor launched three low-density CES (Circuit Emulation Services)-over-Packet processors for supporting TDM voice, video and data services over expanding metro Ethernet and wireless networks.

Zarlink’s three-chip ZL50117 family utilizes CES-over-Packet technology to seamlessly “tunnel” one, two or four streams of TDM traffic, with associated timing and signaling, across Ethernet, and MPLS networks. Zarlink’s CES-over-Packet technology can be designed into line cards in the base station and base station controller to seamlessly carry TDM traffic across the Ethernet connection. TDM traffic timing information is carried end-to-end across the packet network to ensure service still meets relevant T1/E1 standards. Similarly, with Wi-Fi and WiMAX technologies gaining acceptance, CES-over-Packet allows the wireless backhaul of T1/E1 trunks across an Ethernet-based local area network at a lower cost than a microwave link.

The ZL50117 packet processor family consists of three devices. The ZL50115 chip supports a single T1/E1 stream, the ZL50116 device supports two T1/E1 streams, while the ZL50117 chip supports four T1/E1 streams. http://cesop.zarlink.com/

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