Freescale Semiconductor outlined a new software-aware Layerscape system architecture for its third-generation QorIQ portfolio of processors. The new Layerscape architecture aims for greater software programmability and scalability required by network infrastructure to handle the profusion of connected devices, massive datasets, more stringent security needs, real-time service provisioning and increasingly unpredictable network traffic patterns. The goal is to enable real-time, “soft” control over the network. The company plans support for open-standard software programming models and key industry initiatives including software-defined networks (SDNs).
Freescale plans to make the Layerscape architecture the foundation of a broad array of forthcoming QorIQ multicore processors, from many-core data path devices delivering up to 100 Gbps of performance to highly integrated, cost- and energy-efficient products operating at less than 3W, leveraging Power Architecture and ARM technologies as appropriate.
Freescale’s Layerscape architecture modularizes packet acceleration and forwarding operations from high-level routing decisions; streamlines interaction between the layers; leverages a synchronous run-to-completion model; and supports a consistent programming framework across the architecture using standard C/C++ languages.
The modular Layerscape architecture consists of three independent, scalable layers:
General-Purpose Processing Layer (GPPL) – Delivers general-purpose compute performance. This layer is optimized for virtualized cloud services and control plane applications.
Accelerated Packet Processing Layer (APPL) – Performs autonomous packet processing and enables customers to program value-added capabilities in a sequential, synchronous, run-to-completion model that abstracts the hardware microarchitecture and gives customers an embedded, C-based programming model.
Express Packet I/O Layer (EPIL) – Facilitates true, deterministic wire-rate performance between network interfaces (up to 100G), supporting switching capabilities for L2 and above.
The first two QorIQ product families based on the Layerscape architecture are the LS-1 and LS-2, which will leverage dual ARM Cortex processor cores, virtualization support, advanced security, an array of advanced interconnects, a common ISA and software- and pin-compatibility for simple and smooth application migration between the two families. The LS-1 family features two ARM Cortex-A7 cores running at up to 1.2 GHz. The LS-2 family features two ARM Cortex-A15 cores running at up to 1.5 GHz and under 5W total power. Targeted applications for the LS-1 and LS-2 families include residential gateways, enterprise access points, smart energy systems, industrial communications, line cards and robotics.
Initial samples of the first products based on the Layerscape architecture are expected in mid-2013.
“To address the need for more intelligent, dynamic networks, Freescale has taken our QorIQ platform a significant step further with the new software-aware Layerscape architecture,�? said Tom Deitrich, senior vice president and general manager of Freescale’s Networking & Multimedia Solutions Group. “Unlike our competitors, we’ve made software awareness an integral part of our new architecture instead of an afterthought. With innovations including core-agnostic compatibility, independent, highly efficient packet processing and real-time visualization capability, we’re accelerating the network’s IQ.�?
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