IBM unveiled a “neurosynaptic” chip packing one million programmable neurons, 256 million programmable synapses and 46 billion synaptic operations per second per watt. Unlike conventional processors, IBM’s second generation neurosynaptic features a non-von Neumann architecture designed to mimic the way the brain discovers patterns instead of systematically following rules.
The chip was fabricated using Samsung’s 28nm process technology. It boasts 5.4 billion transistors, making it one of the largest CMOS chips ever built.
IBM said its new cognitive chip architecture has an on-chip two-dimensional mesh network of 4096 digital, distributed neurosynaptic cores, where each core module integrates memory, computation, and communication, and operates in an event-driven, parallel, and fault-tolerant fashion. To enable system scaling beyond single-chip boundaries, adjacent chips, when tiled, can seamlessly connect to each other—building a foundation for future neurosynaptic supercomputers. To demonstrate scalability, IBM also revealed a 16-chip system with sixteen million programmable neurons and four billion programmable synapses.
“IBM has broken new ground in the field of brain-inspired computers, in terms of a radically new architecture, unprecedented scale, unparalleled power/area/speed efficiency, boundless scalability, and innovative design techniques. We foresee new generations of information technology systems – that complement today’s von Neumann machines – powered by an evolving ecosystem of systems, software, and services,” said Dr. Dharmendra S. Modha, IBM Fellow and IBM Chief Scientist, Brain-Inspired Computing, IBM Research. “These brain-inspired chips could transform mobility, via sensory and intelligent applications that can fit in the palm of your hand but without the need for Wi-Fi. This achievement underscores IBM’s leadership role at pivotal transformational moments in the history of computing via long-term investment in organic innovation.”
http://www-03.ibm.com/press/us/en/pressrelease/44529.wss
