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Home » Marvell intros a customizable ASIC program in 5nm

Marvell intros a customizable ASIC program in 5nm

July 23, 2020
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Marvell debuted a cutomizable ASIC targetting applications ranging from next generation 5G carriers, cloud data centers, enterprise and automotive.

Marvell’s new ASIC solution enables a multitude of customization options and a differentiated approach with best-in-class standard product IP including Arm-based processors, embedded memories, high-speed SerDes, networking, security and a wide range of storage controller and accelerators in 5nm and below.

With its legacy as part of IBM, GlobalFoundries and AveraSemi, the Marvell ASIC team brings decades of expertise with the custom ASIC model across 14 leading-process nodes and has produced over 2,000 custom ASICs.

“The future of compute requires scalable and highly optimized solutions that can power the data center all the way to the network edge,” said Mohamed Awad, vice president of Marketing, Infrastructure Line of Business, Arm. “Marvell brings a fresh and differentiated approach to addressing these requirements by uniquely utilizing Arm platforms to improve power, performance, and time-to-market for our mutual partners.”

“Marvell custom ASIC has a rich history in significant customization, advanced interfaces and memory solutions. Our ability to pull optimized components, like the Arm processor subsystem, from across Marvell’s product portfolio adds a whole new dimension to what we can deliver,” said Kevin O’Buckley, general manager of the ASIC BU at Marvell. “The breadth of Marvell’s infrastructure technology portfolio is unique in the industry – and is available in one comprehensive offering. We see this as an opportunity to deliver greater value to our existing customers while opening up possibilities for custom silicon implementations that had not previously been viable.”

Key features of Marvell’s 5nm and beyond ASIC:

  • Leading Arm-based processor technologies
  • Pre-optimized processor IP to improve power, performance, and time-to-market
  • Multiple power-optimized SerDes solutions at 112G and beyond
  • Ability to solve demanding system topologies at reduced system cost
  • Advanced packaging solutions for chiplets, integrated memory and optics
  • Lower board and ASIC costs
  • Simpler system integration
  • Bandwidth scaling and power reduction enabled with world-class SerDes
  • Enhanced security, networking and memory IP for the most demanding applications

https://www.marvell.com/products/custom-asic.html

Tags: Blueprint columnsMarvellSilicon
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