Xilinx announced the availability of FPGA-based Version 2.2 reference design cores for the high-speed serial I/O protocol Aurora. The release will enable chip-to-chip, backplane, box-to-box and board-to-board connectivity applications to communicate from 600 Mbps to 10 Gbps per lane.
Aurora is an open protocol, licensed at no cost, which can be implemented in any silicon device/technology including FPGAs, ASICs and ASSPs. It provides a transparent interface to the physical serial links, allowing easy use of the links for carrying data from proprietary or industry standard protocols such as Ethernet or TCP/IP. http://www.xilinx.com
